Hi,
I am developing a peak current mode control of a H bridge dc converter. The output voltage of the converter is controlled by controlling the phase shift of leg B (Q3 & Q4). As it can be seen on the attached picture, the comparator is directly controlling the phase shift.
Since the comparator delivers 1 or 0 (On or Off state), I guess based on the On time I need to control the phase shift. What is the correlation (formula) of the On time vs phase shift?
Thank you.
Hi Ivan,
Could you tell us which MCU are you using?
Thanks in advance!
Best Regards,
Carlos Mendoza
Technical Support Engineer
Hi Carlos,
I am using MC56F82748 chip (TWR-56F8200) and the CodeWarrior 11.0 software.
Thank you in advance.
Kind regards,
Ivan
Hi, Ivan,
Pls refer to the application note of peak current mode of buck DC/Dc converter. The peak current control mode algorithms means that when the peak current reaches an adjustable threshold, the MOSFET turn off, obviously, the control mode does not apply for the phase-shift hardware architecture. If you use phase-shift architecture, you have to use PID and the PID output is the phase-shift angle for a H bridge.
Hope it can help you
BR
Xiangjun Rong
Hi Xiangjun,
In addition to my message, if you use a PID controller you still have the compensation ramp, DAC and comparator, so how that is different from the 2p2z control?
Thank you
Hi Xiangjun,
Thank you for your reply.
I have read that document before, but still it is unclear to me what is the formula of the ON period in terms of time? I think that in order to control the second pair of MOSFETs at 50% duty cycle, we need to control the peak reference current or other parameter to make sure that the switching frequency is fixed and that the duty cycle is 50%. In theory, since the set/reset of PWM cycle happens at every peak current, that does not guarantee 50% duty cycle.
Does the peak current mode control controls the duty cycle instead of the phase shift?
Thank you.
Regards,
Ivan