We have an Msc8156 based project where we interface to an FPGA via the PCIE root complex in the Msc8156. At the moment, all transfers between the Msc8156 and the FPGA are via OCN DMA transfers.
We now need to interface to a different FPGA that comes with some limitations - it does not support DMA transfers for BAR0 accesses.
In a related project I have managed to transfer data between a B4860 and PCIE end point my mapping the PCIE address space (the portion of it we have allocated to the FPGA) to a virtual address space window. This means I can use direct pointer access to the PCIE address space.
My question is: can I do the same thing in the Msc8156? If so how?
I have tried and failed so far, and my assumption is that there isn't a suitable bridge between the DSP core and the OCN address space. Am I wrong in this assumption? In the B4860 I setup a LAW to provide the mapping between a window in the DSP address space and the PCIE address space, but in the Msc8156 the LAWs seem to be directly connected to the OCN DMAs, and therefore presumably not accessible by other initiators?
thanks in advance for any help,
Neale.
