disabling all interrupts on mcf5282

[jjw]

Hi,
I'm using mcf5282 coldfire on the evaluation board DNP/EVB6 Board Revision 1.2.
I want to simulate a 48VDC-communication-bus which consists of signals with the length of 5 and 15µs. For Linux not to interact while sending a sequence of signals I want to disable all interrupts.
This is what I'm trying:

1. save Interrupt Mask Register into a variable
2. disable all interrupts
3. send signal
4. write saved variable back to IMR

Im using the m68k-elf-gcc for compilation of my c-code, which is attached to this post. This is how I compile:
m68k-elf-gcc -Wall -m5307 mbus.c -o mbus -Wl,-elf2flt -lc

Compiles nice but when I try to run my executable on the coldfire I get just one message:
memory fault.

Do you have an idea about what I'm doing wrong?
Maybe you have a hint for me. I'd appreciate it very much.
Cheers,
Jakob

Message Edited by jjw on 2007-03-0904:16 PM

Message Edited by jjw on 2007-03-0904:19 PM

mbus.c

mbus.h

Message Edited by t.dowe on 2009-09-02 05:13 PM

[mccPaul]

Hi

To add to the previous post, you probably want to change the cpu target you have invoked for gcc from -m5307 to -m528x so that the compiler knows which version of the instruction set to use - although it is unlikely to be the cause of your problem.

Secondly, if you want to disable interrupts, then the way to do that is to modify the CPU's status register to mask them. Use something like the assembler in the previous post, which you can make inline if you wish. Here is an assembler function that you can call from C easily:

Code:

/********************************************************************//* * From mcf52xx_lo.s * * This routines changes the IPL to the value passed into the routine. * It also returns the old IPL value back. * * Calling convention from C: *   old_ipl = asm_set_ipl(new_ipl); * * Note that only the least significant three bits of the passed * value are used. */asm_set_ipl:_asm_set_ipl:    link    A6,#-8    movem.l D6-D7,(SP)    move.w  SR,D7       /* current sr    */    move.l  D7,D0       /* prepare return value  */    andi.l  #0x0700,D0  /* mask out IPL  */    lsr.l   #8,D0       /* IPL   */    move.l  8(A6),D6    /* get argument  */    andi.l  #0x07,D6        /* least significant three bits  */    lsl.l   #8,D6       /* move over to make mask    */    andi.l  #0x0000F8FF,D7  /* zero out current IPL  */    or.l    D6,D7           /* place new IPL in sr   */    move.w  D7,SR    movem.l (SP),D6-D7    lea     8(SP),SP    unlk    A6    rts

Finally, a memory fault exception will occur when you attempt to read or write to memory that is not configured for read/write access, or the CPU tries to execute code from an address that is not configured as executable.

Cheers,

Paul.

[DaveRahardja]

First of all, use the debugger to discover which instruction caused the error.

Second, you might have better luck enabling/disabling all interrupts by manipulating the SR instead:

MOVE.W SR,D1
MOVE.W D1,D0 ; Save a copy
ORI.W #$0700,D1 ; Disable all interrupts
MOVE.W D1,SR
; Copy of original SR is in D0