Hello.
I have a project with SmartDSP and *.appli file which i use for buffer[] data placement.
So
*.appli looks like
....
DDR0_shared__data_____cacheable_wb : ".shared_data_ddr0"
....
place (_buffer) | in DDR0_shared__data_____cacheable_wb |
....
////////////////////////////////////////////////////////////////
os_msc815x_link.l3k linker file looks like
...
descriptor_shared_data_ddr0 {
.shared_data_ddr0
.shared_data_ddr0_bss
} > shared_data_ddr0_descriptor;
...
address_translation (*) map11 {
..
shared_data_ddr0_descriptor (SYSTEM_DATA_MMU_DEF): SHARED_DDR0;
..
}
...
////////////////////////////////////////////////////////////////
and os_msc815x_link_app.l3k looks like
SYSTEM_DATA_MMU_DEF = MMU_DATA_DEF_SYSTEM |
MMU_DATA_DEF_WPERM_SUPER |
MMU_DATA_DEF_RPERM_SUPER |
MMU_DATA_BURST_SIZE_4 |
MMU_DATA_CACHEABLE_WRITEBACK |
MMU_DATA_PREFETCH_ENABLE |
MMU_DATA_L2_CACHEABLE_WRITEBACK;
When buffer[]'s size reach 8Mbyte i've got linker error:
[LNK,3,6999,50,.../os_msc815x_link.l3k]: Fatal(F1031): LCF configuration: in core c0, task task0_c0: virtual memory 'shared_data_ddr0_descriptor'(org=0x40180000, size=0x00800000) is not aligned to MATT/MMU constraints on address and size.
When i reduced size - it's OK. What is my fault?
I use msc8156 ADS board with 2Gbyte DDR
Thanks
Solved! Go to Solution.
Hello
The SC3850 core defines some alignment and boundary constraint on MMU descriptors.
The alignment and boundary constraints on MMU descriptor are described in the
MSC8156 SC3850 DSP Subsystem Reference Manual, section
"4.2.2.3.1 Aligned Segment Programming Model" and
"4.2.2.3.2 Flexible Segment Programming Model".
Note that flexible segment programming model is only available for MMU Descriptors which size is < 8Mb -64Kb.
In order to be able to link your application you need to make sure the MMU descriptor is aligned properly.
Perhaps by moving it at the beginning of DDR memory.
CrasyCat
Hello
The SC3850 core defines some alignment and boundary constraint on MMU descriptors.
The alignment and boundary constraints on MMU descriptor are described in the
MSC8156 SC3850 DSP Subsystem Reference Manual, section
"4.2.2.3.1 Aligned Segment Programming Model" and
"4.2.2.3.2 Flexible Segment Programming Model".
Note that flexible segment programming model is only available for MMU Descriptors which size is < 8Mb -64Kb.
In order to be able to link your application you need to make sure the MMU descriptor is aligned properly.
Perhaps by moving it at the beginning of DDR memory.
CrasyCat
Thank you a lot.