MC9S08SH8 ASSEMBLER CODE FOR 20MHZ BUS CLOCK OPERATION

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MC9S08SH8 ASSEMBLER CODE FOR 20MHZ BUS CLOCK OPERATION

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BooleanBob
Contributor IV

I need an initialization assembler piece of code to run at 20MHz bus clock.

Using my USBDM programmer, I can do this with CodeWarrior 11.1 and C projects. In assembler projects, CodeWarrior does not provide a Processor Expert initialization wizard. The USBDM debugger interface allows to set the reference clock to 39.06 KHz and to check the trimming option. I believe that this forces writing the calibration information in ICSTRM at $FFAF and ICSSC at $FFAE.

I have no experience in doing this in assembler, so I took a C coded initialization taken from the CPU.c module for this same chip in a 20MHz  working C project with CodeWarrior Processor Expert wizard.

When setting the debugger reference clock to 39.06 KHz and including this assembler code in my project before the user code, I get a 2x increment of bus clock frequency (exactly) but not 2.5x, so I am doing something wrong. I suspect that I am skipping a piece of code to set the FLL including the 39.06 reference value in some place.

Could someone help me with the correct code? I have checked the following information found here at page 15, but I couldn't understand it.

If the working C example uses this entrypoint function, where is the information that I think is missing related to FLL parameters?

Thank you in advance

 

 

 

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BooleanBob
Contributor IV

Hello Vicente, I am sorry for the delay, but for some reason I was never notified via email about your reply.

If you take a look at my code and also to the programming tool (reliable, tested for years) , the solution that you offered seems to be the same.

I doesn't work for me, and the machine still works at some 8MHz like bus clock freq.

I can't tell if the problem is the code or the programming tool, Whenn running this code it doesn't crash or hang, so it seems to pass the FLL setting and wait loop.

Any other ideas will be very much appreciated.

Kind regards

 

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vicentegomez
NXP TechSupport
NXP TechSupport

you can create the code in PE to get something like this

/* ### MC9S08SH8_24 "Cpu" init code ... */
/* PE initialization code after reset */
/* Common initialization of the write once registers */
/* SOPT1: COPT=0,STOPE=0,??=0,??=0,IICPS=0,BKGDPE=1,RSTPE=0 */
setReg8(SOPT1, 0x02U);
/* SPMSC1: LVWF=0,LVWACK=0,LVWIE=0,LVDRE=1,LVDSE=1,LVDE=1,??=0,BGBE=0 */
setReg8(SPMSC1, 0x1CU);
/* SPMSC2: ??=0,??=0,LVDV=0,LVWV=0,PPDF=0,PPDACK=0,??=0,PPDC=0 */
setReg8(SPMSC2, 0x00U);
/* System clock initialization */
/*lint -save -e923 Disable MISRA rule (11.3) checking. */
if (*(uint8_t*)0xFFAFU != 0xFFU) { /* Test if the device trim value is stored on the specified address */
ICSTRM = *(uint8_t*)0xFFAFU; /* Initialize ICSTRM register from a non volatile memory */
ICSSC = *(uint8_t*)0xFFAEU; /* Initialize ICSSC register from a non volatile memory */
}
/*lint -restore Enable MISRA rule (11.3) checking. */
/* ICSC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
setReg8(ICSC1, 0x06U); /* Initialization of the ICS control register 1 */
/* ICSC2: BDIV=0,RANGE=0,HGO=0,LP=0,EREFS=0,ERCLKEN=0,EREFSTEN=0 */
setReg8(ICSC2, 0x00U); /* Initialization of the ICS control register 2 */
while(ICSSC_IREFST == 0U) { /* Wait until the source of reference clock is internal clock */
}

and after you can use the disassemble option

 

Decoder V-5.0.36 Build 17146, May 27 2017
Options: -ArgFileGenerated_Code/Cpu_c.args -Env"GENPATH=C:/codewarrior111/sh8 20 mhz/Project_Headers;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/device/src;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/lib;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/src;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/device/include;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/include;C:\Freescale\CW MCU v11.1\eclipse\../MCU/lib/hc08c/device/asm_include;C:/codewarrior111/sh8 20 mhz/Generated_Code;C:/codewarrior111/sh8 20 mhz/Sources" -EnvOBJPATH=. -EnvTEXTPATH=. -OGenerated_Code\Cpu_c.lst -ViewHidden -WmsgFob"%f%e:%l:%k:%d %m\n"
Decoding File: 'Generated_Code\Cpu_c.obj'
File format: ELF/DWARF

DISASSEMBLY OF: '.text' FROM 876 TO 964 SIZE 88 (0X58)
Opening source file 'C:/codewarrior111/sh8 20 mhz\Generated_Code\Cpu.c'
91: ISR(Cpu_Interrupt)
Cpu_Interrupt:
00000000 8B PSHH
95: asm(BGND);
00000001 82 BGND
97: }
00000002 8A PULH
00000003 80 RTI
145: void _EntryPoint(void)
_EntryPoint:
00000004 A602 LDA #0x02
00000006 C70000 STA SOPT1
153: setReg8(SPMSC1, 0x1CU);
00000009 A61C LDA #0x1C
0000000B C70000 STA SPMSC1
155: setReg8(SPMSC2, 0x00U);
0000000E 4F CLRA
0000000F C70000 STA SPMSC2
158: if (*(uint8_t*)0xFFAFU != 0xFFU) { /* Test if the device trim value is stored on the specified address */
00000012 C6FFAF LDA 0xFFAF
00000015 41FF0A CBEQA #0xFF,*+13 ;abs = 0x0022
159: ICSTRM = *(uint8_t*)0xFFAFU; /* Initialize ICSTRM register from a non volatile memory */
00000018 C6FFAF LDA 0xFFAF
0000001B B700 STA ICSTRM
160: ICSSC = *(uint8_t*)0xFFAEU; /* Initialize ICSSC register from a non volatile memory */
0000001D C6FFAE LDA 0xFFAE
00000020 B700 STA ICSSC
164: setReg8(ICSC1, 0x06U); /* Initialization of the ICS control register 1 */
00000022 6E0600 MOV #0x06,ICSC1
166: setReg8(ICSC2, 0x00U); /* Initialization of the ICS control register 2 */
00000025 3F00 CLR ICSC2
167: while(ICSSC_IREFST == 0U) { /* Wait until the source of reference clock is internal clock */
00000027 0900FD BRCLR 4,ICSSC,ICSSC
170: setReg8(GNGC, 0x00U);
0000002A 4F CLRA

 

I hope this will help you

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