(DSC) (56800EX) Bug in register optimization when using long long variables

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(DSC) (56800EX) Bug in register optimization when using long long variables

498件の閲覧回数
Lorenzo_Mch_IT
Contributor IV

Discovered bug while using Codewarrior for MCU 11.01 with DSC toolchain for 56800EX cores. (MC56F847xxx).

When a long long variable is initialized with a long long constant and then used in function call, instead of putting its 64bit value on stack, the compiler copies TWICE the higher 32bit word.

That is, when compiling the following code with -v3  -opt level=4   -opt speed -inline auto -inline level=8 optimizations:

long long a1;

a1 = 0x1122334455667788LL;

RDebug_T(a1);

( RDebug is declared as void RDebug_T(long long n); )

the DSC compiler generates the following assembly output: (added some comments to explain what happens)

moveu.w #F__ConstToInitArray_1,R0  // load R0 with address of location containing 0x1122334455667788
move.l X:(R0)+,B // load low 32bit word into B/B10 register
move.l X:(R0)+,A // load high 32bit word into B/B10 register
move.l B10,X:>Fsa1             //   store A:B ( 0x1122334455667788) into sa1
move.l A10,X:>Fsa1+2         //
adda #<4,SP                  // allocate space on stack for RDebug_T parameter to pass sa1 to it
move.l A10,X:(SP-2)            // BUG: instead of putting A:B on stack it puts A:A
move.l A10,X:(SP)               //
jsr >FRDebug_T                  // subroutine will receive 0x1122334411223344 instead of 0x1122334455667788
suba #<4,SP

It seems like it's a bug with register coloring when handling 64bit values.

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386件の閲覧回数
Lorenzo_Mch_IT
Contributor IV

Can't do that right now. It happened with experimental code I'm not allowed to disclose.


As soon as I can come up with a clean demo reproducing the problem I will post it.

I provisionally fixed the problem by declaring a1 as volatile (i.e. volatile long long a1 ) to force reloading its value from memory instead of usign the copy cached into internal registers.

Another fix is to disable optimization, that's why it seems something related to register optimization.

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386件の閲覧回数
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi Lorenzo Micheletto,

From your fix, I believe your issue is due to optimization. Compiler performs optimization by default. Your method is the right way of avoiding it.


Have a great day,
Jun Zhang

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386件の閲覧回数
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi Lorenzo,

Please upload your demo project here. I will check it directly from my side.


Have a great day,
Jun Zhang

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