Some doubts about MC9S08DZ60 clock

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Some doubts about MC9S08DZ60 clock

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jasoncui
Contributor II

Hi, guys

 

I have some doubts about MC9S08DZ60 below, any help would be greatly appreciated!

1. In page 3 of HC S08 Microcontroller datasheet (MC9S08DZ60 Rev.4 6/2008, the same below), it said 40-MHz HCS08 CPU (20-MHz bus) . If this means that the system clock can not exceed 40MHz? If it exceeds, what would be the consequences?

 

2. If the bus clock is generated from a PLL, and the CAN clock source is bus clock, what would be the consequences? Would the CAN communication be unstable?

 

3. In page 314 of the datasheet, it said  When selecting a clock source, ensure that the clock source is properly enabled (if applicable) to ensure correct operation of the RTC.

My question is if PLL is selected as the clock source, can't the RTI be used?  

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