Hi Kris,
There is no way for the user to prioritize interrupts. There is an internal priority, and this is described on
page 66 of document, MC9S08GB60/D.pdf. Keep in mind that internal priority is only relevant in the case of multiple interrupts pending. When an interrupt occurs, further interrupts are locked out until (1) that interrupt service returns (with an RTI) or (2) the code specifically enables interrupts within the service code. Choice (2) is extremely risky in a processor with limited RAM or if using an RTOS, since stack overflow can easily occur.
The suggestion by Peg to disable other interrupts as a test is a good one. Typically, multiple PWM interrupts can cause long holdoff times in servicing lower priority interrupts.
You could eliminate the double read on the data register as follows:
// modify code as follows:
rej = SCI2S1;
Rbajt = SCI2D;
if( rej & 0x08 ) {
rej = rej; // this could be your breakpoint on OR set.
}
// remaining 'M' test code...
NOTE: Since
rej and
Rbajt are assigned to register values, they should be delcared as volatile byte-length types (example:
volatile char rej).
Frank