Dear sir,
We are using MC9S08GB60 controller (8 bit).In this we having a problem in clearing the TDRE flag.In the datasheet of this controller they mentioned the two steps for clearing the TDRE flag.I did that inside my ISR (which is shown below in the code),after that also there is no changes in the status of TDRE flag (TDRE remains high after writing to SCI1D register).Actually whatever i write in the SCI1D (data register),the SCI1D register will not take that data that i saw in that register while debugging. And one more thing in SCI1C2 we are not enabling the TCIE then also TC flag will set. But in the receiver section we cleared the RDRF flag with 2 step statements.Suggest me if any mistakes in my code or mistakes in procedure of handling ISR .Below i written code sample.
#include <hidef.h> /* for EnableInterrupts macro */
#include "derivative.h" /* include peripheral declarations */
#include <MC9S08GB60.h>
#include <stdio.h>
#include <math.h>
#include <string.h>
void interrupt 18 Vsci1tx_isr(void);
// this array of data bytes should written to SCI1D one by one each time ISR call //
unsigned char transmit_byte[11]={0x18,0xAA,0x18,0x10,0xFF,0x58,0xFF,0x90,0xFF,0x16};
unsigned char *transmit_received_data; // Pointer to array of character
void main(void)
{
SOPT=0x02;
EnableInterrupts; /* enable interrupts */
/* include your code here */
transmit_received_data=transmit_byte;
SCI1BDL=0x0D; //baud rate selected for 19200.
SCI1BDH=0x00;
SCI1C1=0x00; // normal 8 bit mode selected,parity check is dissabled //
SCI1C2=0x88; // TIE , TE enabled and normal transmitter and receiver operation selected //
SCI1C3=0x00; // framing error,parity error,noise error and OR interrupts are dissabled //
while(1)
{
}
}
void interrupt 18 Vsci1tx_isr(void) // ISR
{
unsigned char clear_trans_empty_flag=0 ;
clear_trans_empty_flag=SCI1S1; // reading the status register when TDRE=1;
SCI1D=*transmit_received_data; // Writting the data to SCI data register;
transmit_received_data++; // increment the pointer address
}
With regards
SANTHOSH