SPI communication between two MCF51QE128

[nlocatel]

Hi everyone,

I'm facing a little trouble establishing a SPI communication between two MCF51QE128.

I used the CodeWarrior processor expert to make the appropriate beans for both, one is the master and the other is configured as a slave. The beans configurations are apparently correct, clock speed is valid, and electrical link between pins is verified.

But the slave is not executing the SPI Interruption Service Routine though clock and data are being sent from master to slave. The SPI interruption in the slave is, of course, enabled.

Can anyone help with this issue? I don't know what else to do.

You know what, it's solved! It was just the slave select timing, we had to pull it down much more in advance.

Thanks a lot.

Nicolas

[armistej · Accepted solution]

Be sure to watch how fast you run your SPI interface.

There's a limit to how fast the slave device can accept data before it gets overrun.  In a hybrid mode where the first SPI RX byte in a message is received via interrupts, and the rest are accepted by polling, I couldn't get any faster than 1MHz SPI clock when using a 24 MHz external clock on an MCF51CN128 part.   Going to 2MHz and we got overruns occuring regularly.  I didn't try to go any faster than 1MHz because our master only had a fixed choice of clock frequencies at whole MHz values.

Bottom line - for CPU to CPU SPI, the slave's ability to remove data from the SPI RX buffer is the limiting factor.

And yes, as you've discovered, slave select timing is important too.  Choose your SPI mode carefully as they are not created equally.

[nlocatel]

Thanks for your comments, they helped.