Thomas Zenker

ColdfireV2, Reset Problems (PLL)

Discussion created by Thomas Zenker on Sep 15, 2010
Latest reply on Sep 29, 2010 by stzari

For two years now we have a problem with hardware-reset on Coldfire MCF5234. A certain percentage of the produced

Boards won't come out of reset. Some show the problem only sporadically, others persistently.

Ringing the support lines via our distributor didn't show up any solution. The answer always was, there is no problem on

coldfire, it must be on your board. We have dumped a lot of boards...  Also beginning to look around for other architectures.


Now, I got a updated chip errata sheet, and look there is a problem: SECF131 and SECF163, both related to the PLL not starting cleanly, so processor won't come out of reset. Apparently it's a problem on other processors of the CF-V2 also.

As this means for us a redesign of the boards, I have to try to get as much info possible about the problem and

possible workarounds.


My question now is:   how can I proof which one is the problem. The workaround for SECF131 seems to be relatively simple to realize. The workaround for SECF163 is quiet a bit more complicated. We are using normal PLL mode with external reference clock.


  • Are there others who have the same problem?
  • Is SECF131 and SECF163 the same problem, with SECF131 related only to normal PLL/external clock?
  • Anybody tried the workarounds successfully?
  • SECF163 WA seems to be critical in timing, is it? Or could it be done combining RESET-input with a bit of glue logic?
  • Exists there a application note or similar for this problem?

thx in advance for any info