In our design(ls2044).
We need to
- IFC Bus CS1 to connect to a cpld. (Use as a G
- QSPI_A to communicate with SPI devices (not a flash)
- QSPI_B to communicate with SPI devices (not a flash)
Is it feasible or I'm dreaming.
In the DOC, IFC can manage the data bus for NAND-NOR-GPCM-GASIC based on the internal memory map, but I didn't find any example of Multiplexing IO Pin between IFC and QSPA.
For ls2088ardb board. Their has a note: (QorIQ LS2085A/LS2088A Reference Design Board Reference Manual, Rev. 2, 08/2017)
QSPI device and Emulator connector are only available on
RDB Rev E and later. When operating in QSPI mode, the IFC
interface is non-functional, and access to the CPLD through
IFC bus is disabled.
Is it true only for that board or is true for LS2088(or LS2044) ?