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i.mx6 Solo PCIe Endpoint device without DDR

Question asked by Azamat G. on Apr 2, 2020
Latest reply on Apr 3, 2020 by Parker Johnson



I use a congatec conga-QEVAL debugging Board with the qseven conga-QMX6 module installed on it (NXP i. MX6 Solo ARM Cortex A9 1 x 1.0 GHz, 512kB L2 cache, 3W)
I have a task to use conga-QMX6 as a PCIe Endpoint device.

1) is it Possible to implement a PCIe Endpoint device without using the DDR memory that is on my Board?
2) Without using DDR3, I can only use standalone mode, bare-metall programming style. I use the Platform-SDK. Is there a newer way?
3) do I Correctly assume that my application, with the PCIe Endpoint implementation of the device, will run u-boot?
4) the Platform SDK has an example of board_pci.c. Should I use this example as a starting point?


Thank you so much for any help!