IMX8 MQ and OV 5640 ErrSotSync errors

[rstabile]

We are grabbing images over the MIPI CSI2 interface using 'mxc-mipi-csi2_yav'.  We see ErrSotSync errors during normal capture but they clear automatically as the software goes through the process to begin capturing images.  Occasionally we get an ErrSotSync error that fails to clear and stops image acquisition until a hard reset is performed.  The issue tracks with the main board not the camera.  I have experimented with numerous experimental changes to the driver with no improvement.  Is this a known issue and are there any work arounds to recover and continue aquiring images?

[rstabile]

We have resolved this issue. It looks like the CSI Host/DPHY on some imx8 parts is sensitive to bus activity during transitions.  We modified the streamoff function to wait after setting the frame control off register and then disable the CSI Host clocks before setting the sensor in sw standby.

.

static void OV5640_stream_off(struct ov5640 *sensor)
{
 ov5640_write_reg(sensor, 0x4202, 0x0f);

 msleep(30);
 setReg(0x30384650, 0);
 setReg(0x30384660, 0);
 ov5640_write_reg(sensor, 0x3008, 0x42);
}

We turn the clocks on again in the stream on function.

[igorpadykov]

Hi Rod

ov5640 is working fine with i.MX8M EVK, one can test it on reference board

with Demo Images from

i.MX Software and Development Tools | NXP 

fsl-imx8mq-evk.dts

fsl-imx8mq-evk.dts\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

other usage links

i.MX8M EVK MIPI CSI Camera Frame Rate 

DART-MX8M CSI - Variscite Wiki 

DART-MX8M Android Camera - Variscite Wiki 

Regarding "ErrSotSync error" - it is well described in mipi-csi2 specification

(one can try to find it googling) and points to issues with hardware: weak/noisy signal,

unproper layout/terminations. As for "recover" seems only way is to perform reset

described in sect.13.8.2 Reset i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual

However if signal is permanently noisy it may not help, so may be recommended first to check

input signal quality.

Best regards
igor
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[rstabile]

Hi Igor,

Thanks for the response, we are getting the equipment to monitor signal integrity on the bus.  The strange thing is that once streaming is enabled successfully (which is most of the time) we can capture thousands of images without error.  The issue only occurs when we stop and start capture and then once the issue occurs we have to power cycle to recover.  

Can you confirm that the reset described in sect.13.8.2 will also reset the DSI?  In step 3 it refers to 'pclk_reset_n' which when I search is only mentioned in register SRC_MIPIPHY_RCR as MIPI_DSI_PCLK_RESET_N.  

Thanks,

Rod

[igorpadykov]

Hi Rod

reset relates to MIPI CSI-2 RX subsystem with the CSI-2 RX PHY, not

to MIPI DSI Host Controller (MIPI_DSI), described in sect.13.6.

Best regards
igor

[rstabile]

Thanks Igor,

I am uncertain which registers are involved in a runtime reset (as opposed to boot time.) 

Can you point me to a specific sequence of registers? (ie - assert all resets, de-assert pclk_reset_n, set values to all
configuration ports)

How do I know if CSR is included with the controller?

Thanks,

Rod

[igorpadykov]

Hi Rod

one can try with function  mxc_mipi_csi2_phy_reset() in mxc-mipi-csi2_yav driver

mxc-mipi-csi2_yav.c\imx8\platform\media\drivers - linux-imx - i.MX Linux kernel 

Best regards
igor