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DMA to UART communication random behavior

Question asked by Chandrika Joshi on Jan 29, 2020
Latest reply on Feb 7, 2020 by Daniel Martynek

Hi

I am trying to use DMA to send and recieve from UART. I configured the DMA successfully and also see the recieved data in the SRAM. But the recieved data is very inconsistent. Sometimes I recieve garbage value in the first four bytes and then the correct data. Sometimes I recieve at the correct location but data recieved is incorrect. Some other times I recieve correct data. What is the reason for this random behaviour?

I use the function " LPUART_DRV_ReceiveData"  which in turn uses LPUART_DRV_StartReceiveDataUsingDma and EDMA_DRV_ConfigMultiBlockTransfer. Should I make any changes in configMultiBlocktransfer function?

Or is this memory mapping issue?

I use blocking send and non-blocking recieve.

 

Also when I recieve correctly DMA stays in rxBusy state continuously. How can I make the DMA Rx channel get out of busy state?

 

Is using Blocking UART better? When I use blocking UART I dont recieve at all. Does this mean I am doing something wrong in configuration altogether? I know this is a lot of questions and very chaotic but thats how the functionality is behaving too.

 

Kindly help.

Thanks.

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