MPC8280 FLASH启动问题

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MPC8280 FLASH启动问题

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lhb_will
Contributor IV

CS0连接的16位FLASH,准备在启动时从该FLASH读取HW CONFIG,然后从FLASH中启动运行程序。这样有什么问题吗?比如它读完0x00、Ox08、Ox10、0x18后,然后下一个访问地址应该是哪里? 0x00000000( 0xFE0000000)?这样是不是又读FLASH的HW CONFIG部分了,这样程序就跑错了? 

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r8070z
NXP Employee
NXP Employee

The MPC8280 as configuration master reads a byte from FLASH on CS0 at address 0x00 then it reads a byte from addresses 0x08, 0x10, and 0x18. These four bytes are used to form the 32-bit configuration word (HRCW) for the configuration master itself. Then it continues to read bytes from the FLASH at 0x20, 0x28 … and up to 0xF8. It because configuration master can provides 7 configuration words for 7 configuration slaves. It reads these words even there is only configuration master and no any slave.

Then the MPC8280 starts to fetch boot code from memory on the CS0 starting from the reset vector.The HRCW[BMS] and HRCW[CIP] control that
The HRCW[BMS] bit defines the initial value for BR0[BA]
  HRCW[BMS] =0 sets boot memory region 0xFE00_0000—0xFFFF_FFFF
  HRCW[BMS] =1 sets boot memory region 0x0000_0000—0x01FF_FFFF
and the HRCW[CIP] defines exception vector address.
  HRCW[CIP]=0 sets MSR[IP] = 1 exceptions are vectored to the physical address 0xFFFn_nnnn
  HRCW[CIP]=1 sets MSR[IP] = 0 i.e. exceptions are vectored to the physical address 0x000n_nnnn.

For example for boot starting from address 0x100 we need to use HRCW[BMS] =1 and HRCW[CIP]=1. Correspondingly HRCW[BMS] =0 and HRCW[CIP]=0 select 0xFFF0_0100 as stat address.

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r8070z
NXP Employee
NXP Employee

The MPC8280 as configuration master reads a byte from FLASH on CS0 at address 0x00 then it reads a byte from addresses 0x08, 0x10, and 0x18. These four bytes are used to form the 32-bit configuration word (HRCW) for the configuration master itself. Then it continues to read bytes from the FLASH at 0x20, 0x28 … and up to 0xF8. It because configuration master can provides 7 configuration words for 7 configuration slaves. It reads these words even there is only configuration master and no any slave.

Then the MPC8280 starts to fetch boot code from memory on the CS0 starting from the reset vector.The HRCW[BMS] and HRCW[CIP] control that
The HRCW[BMS] bit defines the initial value for BR0[BA]
  HRCW[BMS] =0 sets boot memory region 0xFE00_0000—0xFFFF_FFFF
  HRCW[BMS] =1 sets boot memory region 0x0000_0000—0x01FF_FFFF
and the HRCW[CIP] defines exception vector address.
  HRCW[CIP]=0 sets MSR[IP] = 1 exceptions are vectored to the physical address 0xFFFn_nnnn
  HRCW[CIP]=1 sets MSR[IP] = 0 i.e. exceptions are vectored to the physical address 0x000n_nnnn.

For example for boot starting from address 0x100 we need to use HRCW[BMS] =1 and HRCW[CIP]=1. Correspondingly HRCW[BMS] =0 and HRCW[CIP]=0 select 0xFFF0_0100 as stat address.