Has anyone figured out a working solution to put the heap and the stack on the SDRAM on MIMXRT1064 Evaluation Board?
I thought this would have been so easy to find an answer to since this is such a common configuration for this level of micro-controller. However, amazingly this has not been the case.
I did find some threads on this matter but have not found a solution that works yet.
It would be nice if NXP provided a straight forward working solution.
Below is what I have tried so far but does not fully work.
The behavior between when the heap & stack is placed in SRAM_DTC and when they are placed in SDRAM is different.
The SDK example used is lwip_mqtt_freertos which is included with SDK v2.6.1.
With the heap & stack placed in SRAM_DTC, the example connects to the test mqtt broker and subscribe/publish works.
However, when the heap & stack is placed in SDRAM, following the configurations described below, the example only attempts to connect to the test mqtt broker and nothing happens, with everything remaining the same as SRAM_DTC setup.
1) Add the following to Compiler options:
2) Modify the Memory Configuration as below:
3) Explicitly specify the heap/stack placement. (this may be optional but some suggest that there may be a bug
in MCUXpresso and this has to be explicitly specified)
Help would be greatly appreciated