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One question about FlexRay synchronously Method

Question asked by Chen Shixuan on Sep 26, 2019
Latest reply on Oct 2, 2019 by Diana Batrlova

Hello,

I am now learning how to configurate a FlexRay cluster by using MC9S12XF512. My node has successfully joined a two nodes FlexRay cluster (There exists a configurated FlexRay network). In this cluster, my node can receive the message that the other two nodes communicate. But when I try to create a FlexRay network between my node and any one of the existed FlexRay node separately, it will be failed. That is means, when the FlexRay network is activated, my node can join in the network and work properly. However, my node can not activate a FlexRay network.

 

I have set my node as a coldstart node in Fr_HW_cfg_00. And it also work when I configurate a FlexRay network with two MC9S12XF512 node.

 

The problem may be that I don't set a synchronously method for this node (TT-L, TT-D or TT-E), I have not found where can I set this parameter. Is there anyone konw this part?

 

Below is the Fr_HW_cfg and Fr_low_level_cfg

const Fr_HW_config_type Fr_HW_cfg_00 =
{
    0x000400,     // FlexRay module base address
    0x0FF000,//0x0FF000     // FlexRay memory base address (MB headers start at this address)
    FR_MC9S12XF,     // Type of Freescale FlexRay module
    FALSE,          // Synchronization filtering
    //FR_EXTERNAL_OSCILLATOR,
    FR_INTERNAL_SYSTEM_BUS_CLOCK,
    0,              // Prescaler value
    16,             // Data size - segment 1
    8,              // Data size - segment 2
    10,             // Last MB in segment 1 (Number of MB in Segment1 - 1)
    18,             // Last individual MB (except FIFO); (Number of MB in Segment1 + Number of MB in Segment2 - 1)
    29,             // Total number of used MB (Last_individual_MB + 1 + FIFO)
    TRUE,           // Allow coldstart
    0,              // The value of the TIMEOUT bit field in the SYMATOR register - not implemented for all FlexRay modules
    0,              // Offset of the Sync Frame Table in the FlexRay memory
    FR_DUAL_CHANNEL_MODE    // Single channel mode disabled
};

 

const Fr_low_level_config_type Fr_low_level_cfg_set_00 =
{
    10,         /* G_COLD_START_ATTEMPTS */
    5,          /* GD_ACTION_POINT_OFFSET */
    91,         /* GD_CAS_RX_LOW_MAX */
    0,          /* GD_DYNAMIC_SLOT_IDLE_PHASE */
    14,         /* GD_MINISLOT */
    5,          /* GD_MINI_SLOT_ACTION_POINT_OFFSET */
    65,         /* GD_STATIC_SLOT */
    0,         /* GD_SYMBOL_WINDOW */
    15,         /* GD_TSS_TRANSMITTER */
    59,         /* GD_WAKEUP_SYMBOL_RX_IDLE */
    50,         /* GD_WAKEUP_SYMBOL_RX_LOW */
    301,        /* GD_WAKEUP_SYMBOL_RX_WINDOW */
    180,        /* GD_WAKEUP_SYMBOL_TX_IDLE */
    60,         /* GD_WAKEUP_SYMBOL_TX_LOW */
    2,          /* G_LISTEN_NOISE */
    5000,       /* G_MACRO_PER_CYCLE */
    2,         /* G_MAX_WITHOUT_CLOCK_CORRECTION_PASSIVE */
    2,         /* G_MAX_WITHOUT_CLOCK_CORRECTION_FATAL */
    22,         /* G_NUMBER_OF_MINISLOTS */
    62,         /* G_NUMBER_OF_STATIC_SLOTS */
    4985,       /* G_OFFSET_CORRECTION_START */
    17,         /* G_PAYLOAD_LENGTH_STATIC */
    5,          /* G_SYNC_NODE_MAX */
    0,          /* G_NETWORK_MANAGEMENT_VECTOR_LENGTH */
    TRUE,      /* G_ALLOW_HALT_DUE_TO_CLOCK */
    20,         /* G_ALLOW_PASSIVE_TO_ACTIVE */
    FR_CHANNEL_AB,  /* P_CHANNELS */
    1875,        /* PD_ACCEPTED_STARTUP_RANGE */
    3,          /* P_CLUSTER_DRIFT_DAMPING */
    72,         /* P_DECODING_CORRECTION */
    6,          /* P_DELAY_COMPENSATION_A */
    6,          /* P_DELAY_COMPENSATION_B */
    401202,     /* PD_LISTEN_TIMEOUT */
    601,        /* PD_MAX_DRIFT */
    0,          /* P_EXTERN_OFFSET_CORRECTION */
    0,          /* P_EXTERN_RATE_CORRECTION */
    24,          /* P_KEY_SLOT_ID */
    TRUE,       /* P_KEY_SLOT_USED_FOR_STARTUP */
    TRUE,       /* P_KEY_SLOT_USED_FOR_SYNC */
    1392,        /* P_KEY_SLOT_HEADER_CRC */
    21,         /* P_LATEST_TX */
    7,          /* P_MACRO_INITIAL_OFFSET_A */
    7,          /* P_MACRO_INITIAL_OFFSET_B */
    2,         /* P_MICRO_INITIAL_OFFSET_A */
    2,         /* P_MICRO_INITIAL_OFFSET_B */
    200000,     /* P_MICRO_PER_CYCLE */
    241,       /* P_OFFSET_CORRECTION_OUT */
    601,        /* P_RATE_CORRECTION_OUT */
    FALSE,      /* P_SINGLE_SLOT_ENABLED */
    FR_CHANNEL_A,   /* P_WAKEUP_CHANNEL */
    30,         /* P_WAKEUP_PATTERN */
    40,         /* P_MICRO_PER_MACRO_NOM */
    8           /* P_PAYLOAD_LENGTH_DYN_MAX */
};

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