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Extra bit when using native slave select on imx6

Question asked by Abhinandan B R on Jun 18, 2019
Latest reply on Jun 19, 2019 by Abhinandan B R

I am using native cs pins for SPI master configuration as below:

&ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi2>;
        fsl,spi-num-chipselects = <2>;
                cs-gpios = <0>, <0>;
        dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
        dma-names = "rx", "tx";
        status = "okay";


pinctrl_ecspi2: ecspi2grp {
                                fsl,pins = <
                                                MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK                0x100b1
                                                MX6QDL_PAD_EIM_OE__ECSPI2_MISO                 0x100b1
                                                MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI                               0x100b1
                                                MX6QDL_PAD_EIM_RW__ECSPI2_SS0                   0x100b9
                                                MX6QDL_PAD_EIM_LBA__ECSPI2_SS1                   0x100b9



I see that when I'm using native cs pins I see 1 bit data after every word read/write transfer.

Example: if I send 0x40,0x40,0x0. On the slave, the data received is 0x40,0x40,0x80.

Similar issue when receiving from slave.


If I use gpio pins as CS, this issue is not seen.

Please let me know if any fix is available for this issue.


I am using yocto bsp PD18.1.0.