etpu input and interrupt polarity setting in 5777C

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etpu input and interrupt polarity setting in 5777C

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wujt
Contributor II

Hi

 

 I am new to eTPU usage.

 

I have followed both AN3769SW and AN47908SW to set up my project on MPC5777C EVB. Toothgen function works well. For input channel 0 and 2, IGF was enable as Fig. IGF in the attachment.

HOWEVER, the engine state observed in freemaster  changes between PRE_FULL_SYNC and FIRST_HALF_SYNC, and it can't achieve FULL_SYNC.

In addition, observed in the EmbSys Registers in S32DS, the channel interrupt status never changed. The breakpoints in the crank and cam ISR also never work. 

I have tried many types of configuration. but it did not take effect. I think it shouldn't be so hard, but I don't know what can I do next. Could you help me?

any suggestions ?

 

 

Thanks in advance.

 

 

Best regards

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davidtosenovjan
NXP TechSupport
NXP TechSupport

I was briefly looking to your IGF configuration and I don't understand it too much, to be honest.

You should configure IGF_1 channels 1 and 3 for eTPUA0 and eTPUA2.

pastedImage_2.png

Also MCR register looks this way, so you can (for instance) hardly mask MDIS bit by value of 3, if it is single bit field.

pastedImage_3.png

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