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DDR4 RDIMM Bringup in LS2088A

Question asked by pradeep TG on Jun 6, 2019
Latest reply on Jun 22, 2019 by Yiping Wang

HI Team,

 

We are using RDIMM DDR4 VL33A2G63F-N7SC , how to debug it further below is the logs booting stopped at uboot

Reset Configuration Word (RCW):        00000000: 402828b0 28280040 00000000 00000000        00000010: 00000000 00000000 00200000 00000000        00000020: 020011a0 00002580 00000000 00000000        00000030: 00000908 00000000 00000000 00000000        00000040: 00000000 00000000 00000000 00000000        00000050: 00000000 00000000 00000000 00000000        00000060: 00000000 00000000 0001b000 00000000        00000070: 3f370000 00010008 Board: LS2088AE Rev1.1-RDB, Board Arch: V15, Board version: P, boot from invalid setting of SW6 FPGA: v255.255 SERDES1 Reference : Clock1 = 156.25MHz Clock2 = 156.25MHz SERDES2 Reference : Clock1 = 100MHz Clock2 = 100MHz I2C:   ready DRAM:  Initializing DDR....using SPD Detected RDIMM VL33A2G63F-N7SC    Detected RDIMM VL33A2G63F-N7SC    DP-DDR:  Not detected31.9 GiB DDR    31.9 GiB (DDR4, 64-bit, CL=10, ECC on)        DDR Controller Interleaving Mode: 256B        DDR Chip-Select Interleaving Mode: CS0+CS1

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