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LPC-4330-Flash configuration?

Question asked by Sébastien Lagarde on May 28, 2019
Latest reply on May 28, 2019 by LPCX presso support



I am working  on a LPC 4330 program running on a M0 and a M4 with a S25FL064P external flash. The projects has 2 configuration (debug / release ).The program build and debug works great on LPCXpresso 7.5.0  and LPC link 1.3 JTAG probe.


Since LPCXpresso  is not maintained anymore I would like to move this project to MCU Xpresso 10.3.

To do so I tried 2 approaches: directly import LPC projects in my new MCU project and rebuild from scratch configuration files of the project building binary / axf files works great.


In release configuration mass erase and debug work great. But when I try to debug / erase flash memory in debug mode I get these errors:


Mass Erase - can't find a programmable memory area at 0xFFFFFFFF
Failed to erase flash: Ef(11). No flash configured.
(100) Target Connection Failed


and trying to launch debug configuration shows:


Using memory from core 0 after searching for a good core
debug interface type = Cortex-M3/4 (DAP DP ID 4BA00477) over JTAG TAP 0
processor type = Cortex-M4 (CPU ID 00000C24) on DAP AP 0




Target error from Write register: Ep(08). Cannot access core regs when target running.
GDB stub (crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.


The Link server Flash driver is the LPC18_43_SPIFI_GENERIC.cfx


I noticed that in debug configuration the file LPC4330_part.xml didn't contains my flash memory instance but in release mode it was contained. So I modified LPC4330_part.xml of the configuration to add my flash memory instance but the line was automatically deleted when I launch the debug configuration or attempt a mass erase on the device.


I tried also with a LPC link 2.0 probe, the problem is exactly the same.


Have you experienced a similar issue or have some hints to solve this ?