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QT4241 PCIe as an Enpoint

Question asked by Sandhya B S on Apr 29, 2019
Latest reply on May 16, 2019 by ufedor



PCIe3 is configured as endpoint in a T4241 processor (HOST_AGT_PEX is configured accordingly).

The endpoint is connected to a PCIe switch. The Root Complex is another T4241 processor. Both the boards are communicating over a VPX backplane. During enumeration at Root Complex able to get all other port details of Pcie switch to which Endpoint is connected, but unable to get Endpoint details (CONFIG[CFG_READY] is set)


Is there any other configuration to be taken care of?  


Thanks and regards,