Now, we are designing our evaluation board circuit using iMX8QX.
So we want to know the following specification for LPDDR4 Layout Design Guide Line.
1.Line Length Difference (Differential Pair P/N, CK/DQS)
2.Line Length Difference (Single - ended, CS/CKE/DMI/CA/DQ)
3.Space between Differential Pair and Other Traces
- CK_t/c to CAx, CS_n
- CK_t/c to CKEx
- CK_t/c to DQSx_t/c
- DQS_t/c to DQ
- DMI to DQ
4.Characteristic Impedance (Z0)
5.Differential Impedance (Z0_diff)
Thanks a lot