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MIPI CSI-2 IMX6 Driver for Raw Data

Question asked by c bturmel on Nov 28, 2018
Latest reply on Nov 30, 2018 by igorpadykov

Hello,

 

First of, I am quite new with MIPI CSI-2. 
My goal is to read Raw data coming from a FPGA through DPHY to a IMX6 and capturing the data with V4L.

 

I'm kind of working backward right now as I have to assume what will come from the FPGA will be arbitrary raw data and I will be able to collect that data in a defined format. The format selected for now would be RGB565 , Width: 640, Height:480. Also, I would simply use one lane and only 1 IPU.

 

Therefore I'd like to edit the IMX6 Driver to allow this to happen. I know that by default the iMX6 is working with OV5640 and I'm wondering what is the best course of actions.

 

My questions are the following:
1-What are the modification required for the driver to enable MIPI CSI-2 on imx6 without the OV5640?
2-How to know that I will be able to receive data with DPHY and if so how can I set the proper format for it.
3-Is the idea feasible toward V4L to capture the data

 

So far, what I figured is within "imx6qdl-var-dart.dtsi", I edited the following:

 

 

/* Freescale MIPI CSI2 Controller for i.MX6DQ/i.MX6SDL
Required properties for mipi csi2 on specified board:
- ipu_id: ipu id which mipi csi2 connected to.
should be 0 or 1 for i.MX6DQ; should be 0 for i.MX6SDL
- csi_id: csi id which mipi csi2 connected to.
should be 0 or 1 for i.MX6DQ/i.MX6SDL
- v_channel: virtual channel which send to MIPI CSI2 controller
should keep consistent with the input MIPI signal.
- lanes: data lanes of input MIPI signal. The maximum data lanes is 4.
should keep consistent with the input MIPI signal.
- status: should be set to "okay".
*/

&mipi_csi {
status = "okay";
ipu_id = <0>;
csi_id = <0>;
v_channel = <0>;
lanes = <1>;
};


Also, I edited this part in "imx6qdl.dtsi":

 

 

/*
Required properties for mipi csi2 controller:
- compatible: should be "fsl,imx6q-mipi-csi2"
- reg: <base addr, range> contains mipi csi2 register base address and range
- interrupts: <type num flag> where type is a interrupt type, num is the
interrupt number and flag is a field that level/trigger information for
the interrupt.
- clocks: the clock sources that mipi csi2 depends on.
- clock-names: the name is related to the clock source one by one.
- status: should be set to "disable".*/
mipi_csi: mipi_csi@021dc000 { /* MIPI-CSI
*/
compatible = "fsl,imx6q-mipi-csi2";
reg = <0x021dc000 0x4000>;
interrupts = <0 100 0x04>, <0 101 0x04>;
clocks = <&clks IMX6QDL_CLK_HSI_TX>,
<&clks IMX6QDL_CLK_EMI_SEL>,
<&clks IMX6QDL_CLK_VIDEO_27M>;
/* Note: clks 138 is hsi_tx, however, the dphy_c
* hsi_tx and pll_refclk use the same clk gate.
* In current clk driver, open/close clk gate do
* use hsi_tx for a temporary debug purpose.
*/
clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
status = "disabled";
};



Again, I'm quite new to all of this so please bare with me! I'm very open to the subject and I took a lot of time reading datasheets, but I'm basically starting from scratch.

Thank you for your time!
CBT

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