AnsweredAssumed Answered

PF3000 VLDO34in level issue

Question asked by Franky Hsu on Nov 28, 2018
Latest reply on Nov 29, 2018 by Jose Alberto Reyes Morales

Hi Support,


We have ever received a review update (see below information) that asks us not to follow the imx7D saber design but change to 3.6V input for VLDO34in pin.


Now, we use a fix 3.6V LDO for it to dropout the voltage from VBAT to 3.6V but now we see the that the DC range test result is 3.582~3.624V, Vrms test result is 3.59~3.6V. The datasheet shows the range is 2.8~3.6V. I see the explain from your support team shows there is only linkage current issue. Will my test result have any chip damage issue on this pin?





Keep PMIC_PWR(=3.75V) clean, always no pulse or spike than 4.5V for VLDO34IN (pin #21), this DC 3.75V voltage is OK. Suggest to add one more 4.7uF cap for VLDO34IN noise or pulse decoupling. The reason is as below:
PF3000 datasheet was updated with VLDO34VIN pin max rating from 4.5V to 3.6V in Datasheet Rev7.0. The 7D reference design was not updated.
The VLDO34IN can only accept 3.6V input is due to the pin is using a 3.6V ESD structure. With supply a little bit higher than 3.6V would not definitely damage the pin but take the pin into possibility of leakage. And the leakage will increase with the voltage goes higher, its level is very small. See below, it is good if you have chance to reduce main power supply to exactly 3.6V.