I built the u-boot image from NXP SDK-1.9 and flash the image at NOR flash 0xeff40000. However, when the device starts, the serial console displays the following error:
U-Boot 2015.01+SDKv1.9+geb3d4fc (Dec 04 2015 - 07:52:10)
CPU0: P2020E, Version: 2.0, (0x80ea0020)
Core: e500, Version: 5.0, (0x80211050)
CPU0:1000 MHz, CPU1:1000 MHz,
DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:31.250 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Board: P2020RDB-PCA CPLD: V15.15 PCBA: V15.0
rom_loc: nor upper bank
SD/MMC : 4-bit Mode
eSPI : Enabled
DRAM: DIMM 0: is not a DDR3 SPD.
SPD error on controller 0! Trying fallback to raw timing calculation
Detected UDIMM Fixed DDR on board
1 GiB (DDR3, 64-bit, CL=5, ECC off)
I have an old Freescale p2020rdb board (Rev. B) which uses DDR2 RAM.
Can the u-boot be modified so that it can boot on this board? If yes, what needs to be changed?
Thank you for your help.