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MC33908 Debug issue

Question asked by Daniel Wax Employee on Oct 25, 2018
Latest reply on Oct 25, 2018 by Allan An

SOKON (SF Motors) is using this SBC as part of one of its Power inverter designs for an EV motor. 



               We are using the NXP MC33908 as our safety&power manage chip, recently I am working on that and bring up the fail-safe watchdog, I met a tough problem and wish you can help me on that:

33908 have Debug mode which can be enabled by a hardware input pin(pin15), once it activated all the watchdog error will not cause any outputs like reset(RSTB) or interrupt(FS0B). And for watch dog,  after power up it have  a 256ms initial window(INIT FS mode) which user needs to do the configuration and first wd-refresh within that window, after that fail-safe state machine will goes into WD_NORMAL_RUNNING mode

So we set the 33908 in Debug mode,  but if I do the first wd-refresh after 256ms, it will still reset even though the Debug mode is activated,so is there a way the we can resolve this problem or clean the 256ms window time counter?



When you are in Debug mode (when you apply the watchdog fault), the part shall not go into RESET due to Watchdog, but it can still Reset or latch FS0b due to other fault.

A start up time you will see most of the Power Supply flags to be raised (Vpre, Vothers…), and you will need to clear it.

It is normal because you just went through a power On cycle.


When you have cleared all the fault you should see the INTB get High.

If it gets low it means you have another fault and you will need to read it through SPI.


Do you see the INTB pins toogling ?

Have you try to clear the flags or identify exactly their origin.



               I tried to clear the flags by read multiple times of Diag Vreg#3/2/1 and also IO_input, and now all the flags be cleared, and I also fill the FS_OUT with right value(0xB2), but the FS0B still keep low and reset when I tried to refresh WD, do you know any reason?