I'm sending a 0-5 V square wave signal into FTM1_CH0 of a K64, with the input filter value set to 16, and the mode set to detect rising edges. By my understanding, that means that the FTM requires the input signal to remain in a high state for 16 bus clock cycles (i.e. 260 ns with bus clock = 60 MHz) following a low-to-high transition before it sets the CHnF flag and writes the input capture register C(n)V with the counter value. However, I've discovered that the FTM is occasionally counting small glitches on the input signal as a true edge.
Above is a scope trace showing six true edges and two glitch events that cause false edge triggers. To capture this scope trace, I have caused a GPIO pin to toggle (channel 1, yellow) in the FTM ISR that is fired whenever an edge is detected on the input signal (channel 3, blue).
Zooming in on the glitch events, I see that they do not last the minimum duration set by the input filter value (there is a very brief spike, < 50 ns, on the input signal). Furthermore, the input high level is not > 0.7*V_DD, as required to be considered an input high voltage. (I have V_DD set to 1.8 V, so the input signal needs to be at least 1.26 V. Here it looks like it maybe reaches 800 mV... although perhaps maybe my scope is not resolving the true peak height). Lastly, you can also see that this type of glitch event does not always cause an edge detection event (bottom panel).
What would the reason be for this sort of behavior of the FTM input capture filter for edge detection?