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PTN3460I: Possible custom/training pattern on LVDS output?

Question asked by Oddgeir Austad on Sep 14, 2018

Hi,

 

we have a project where a PTN3460I is connected to an Intel Arria 10 FPGA via the LVDS output ports. To enable the use of DPA on the FPGA LVDS inputs a training pattern (or known pattern) is required from the source. Is there any way to setup a custom or training pattern from the LVDS outputs on the PTN3460I?

Regards,

Oddgeir

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