In imx6ull evk board, the DDR size is 512MB, Could you please confirm the DDR start address is “0x80000000”??
Assuming the DDR start address is “0x80000000”, we have the following banks each of which is 512Mb We are trying to test all the DDR3 locations ie., entire 512MB which is organized into 8 banks
We were able to write and read the pattern AA55 into the first 512Mb ie., 0x80000000 to 0x9fffffff, but we are unable to write and read from 0xA0000000 location onwards till 0x180000010 Could you please let us know in detail, why we are unable to read and write from 0xA0000000 location onwards till 0x180000010 is there any reserved memory locations?? Could you please share the DDR memory map, why we are unable to test entire DDR3 memory locations We followed 2.2 ARM Platform Memory Map in IMX6ULLRM but it says from 8000_0000 to FFFF_FFFF 2048 MB it is meant for MMDC—x16 DDR Controller, but we are unable to access DDR3 0xA0000000 till 0x180000010 which is less than 2048 MB Bank addresses : bank_num start_address end_address 0 0x80000000 0xA0000000 1 0xA0000004 0xC0000004 2 0xC0000008 0xE0000008 3 0xE000000C 0x10000000C 4 0x10000000D 0x12000000D 5 0x12000000E 0x14000000E 6 0x14000000F 0x16000000F 7 0x160000010 0x180000010 Used commands to write at uboot level. I am able to write known pattern from 0x80000000 to 0x9fffffff ----bank0 and able to read back same pattern. When I set address 0xa0000000 then it is not able to write the set pattern , even I have tried changing the value of CONFIG_NR_DRAM_BANKS as 3 at u-boot board file, still not able to write to bank1.
see the below logs :
a0000000: 00007e00 00000000 00000000 00000000 .~.............. a0000010: 00007e00 00000000 00000000
Thanks in advance.