In the reference manual (MXRT1050RM) Chapter 30 FlexSPI Controller there is a note that states:
"Octal mode is supported by combining SIOA[3:0] and
SIOB[3:0], on this device."
Does this mean that if we need to access 2 x QSPI FLASH memory devices such that we can use them in byte access mode then we need to drive the control signals separately from the A and B FlexSPI channels i.e. FLEXSPI_A_SCLK and FLEXSPI_A_SS0_B control signals to say the lower nibble of data (FLEXSPI_A_DATA[0:3] for IC#1 and FLEXSPI_B_SCLK and FLEXSPI_B_SS0_B control signals to the upper nibble of data (FLEXSPI_A_DATA[4:7] ?