I'm doing a design with the i.MX6UL processor with a coin cell backup for RTC and am needing to draw as little current as possible when there is no system power.
Using the eval board for this processor, I'm seeing the current draw at 300 uA when powered from VDD_COIN_3V. I'm assuming this large current draw is coming from various leakage currents on the design:
- POR_B leakage current on the reset circuitry
- PMIC_ON_REQ leakage current
I'm assuming if I use MOSFET's to help isolate these lines during a coin cell only power I can get my coin cell current draw significantly lower? Are there other areas of leakage current I should be concerned about?