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i.MX6 IPUx_DI0_STAT

Question asked by Toshishisa Sugiyama on Mar 13, 2018
Latest reply on Mar 15, 2018 by igorpadykov

Hi, 

 

I have questions about function of IPUx_DI10_STAT register of IPU in i.MX6DQ reference manual. 

 

1. There are status bits of DI0_CNTR_FIFO_FULL and  DI0_READ_CNTR_EMPTY.

    What FIFO status does it indicate?  Does this FIFO use data transfer from DMFC/Memory to DI0?

 

2. There are status bits of DI0_READ_FIFO_FULL and DI0_READ_FIFO_EMPTY.

   What FIFO status does it indicate?  Does this FIFO use data transfer from smart Display or DMFC/Frame buffer?

 

Best Regards,

Sugiyama

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