I cannot understand why the NXP support team releases a demo for the MK60 tower board
that leads into a failed compilation cos insufficient heap size.
After some invastigation I figured out it is a problem of the 2 RAM areas of the M4 core
(unfortunately I realized this only after this issue occured)
But why NXP releases a demo that doesn't work? For a beginner it is not funny.
Is it a M4 problem or a special NXP design issue?
c:/nxp/mcuxpressoide_10.1.1_606/ide/tools/bin/../lib/gcc/arm-none-eabi/6.3.1/../../../../arm-none-eabi/bin/ld.exe: twrk60d100m_demo_apps_lwip_lwip_ping_freertos.axf section `.heap' will not fit in region `SRAM_UPPER'
SRAM_UPPER: 82240 B 64 KB 125.49%
So how can I fix this problem without run into danger the CPU makes an access at this border 0x20000000
And how can I tell the linker to set for example an fixed array into the SRAM_LOWER area