I'm having trouble getting the DMEM to work at speed.
The spec says "Access latency (zero wait-states) is similar to that of a data cache"
My tests show that I am able to access the local DMEM at only 25% faster than main memory with the D-Cache Disabled.
When D-Cache is enabled it jumps 200% faster relative to Disabled cache, this indicates that the DMEM is being cached ?
This does not make sense unless the access are going the main AHB bus.
I have checked DCR 496 (DMEMCTL0)and it shows defaults.0x41B.
I changed it to not bypass decorated access 0x01B, no speed change.
I changed it to not bypass decorated access and disable ECC checking 0x00, no speed change.
Any idea what is happening here ?