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TWRK65 unable to communicate to PHY (KSZ8041) while using TWR_SER board

Question asked by Ameer Hamza on Dec 20, 2017

Dear all,

 

I am using custom bare-metal application and establish communication between PHY [(KSZ8041) attached to TWR_SER board] and twr-k65f180m board, however if i attach twr-k70 board PHY works just fine. The problem is such that i can not read PHY_ID or read any PHY registers correctly, it always return with 0xffffff no matter whatever register i tried to read. I had configure MAC to operate in RMII mode and double checked the pin configuration. However i had a little doubt over RMII clocking, while reading K65 user manual, In last paragraph of section 3.1 it says we must provide 50 MHz clock to ENET_1588_CLKIN through TWR_SER Module. So i configured TWR_SER module to provide 50 MHz by selecting J2 (Jumper on TWR_SER module) to be set as 3-4 and J3 (Jumper on TWR_SER module) to be set as 2-3 PTE26 to ENET_1588_CLKIN and RMIISRC (bit 19 of register SIM_OPt2) as External bypass clock (ENET_1588_CLKIN). I have been stucked in this problem for a week now, If some one can tell me from current scenario what I am doing wrong, would be really helpful. Thanks in advance.

 

Kind Regards,

Hamza.

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