I'm experiencing a very nasty problem at production. I have an iMX6SX on my board, and among other things, I'm using a z-wave chip also in the circuit. The communication between them is via UART.
In order to successfully program the z-wave chip, the z-wave programmer needs to take ownership of the very same UART lines that connect the z-wave chip with the iMX6SX and there is where I suspect the problem is.
I read in the datasheet that the reset state for all the iMX6 IO lines is input, (tri-state). When the board is new, it does not run any code and therefore I assume that all the IO are tri-stated. But that is my first question, can I safely assume that all the IO are tri-stated when there is no code to run on the iMX6?
Another question is, what is the IO behavior if I put the iMX6 in "download mode"? I guess that they are tri-stated but again, I'm not sure.
I haven't been able to confidently determine the answer to these question by the information on the RM.
And unfortunately, the test fixture was not designed with a pogo pin that allows us to keep the iMX in reset while we attempt the z-wave chip programming.
So my last question is, is it necessary to keep the iMX6 in the RESET state, that meaning, driving the POR# line low, to avoid any activity on the IO and effectively have all the IO tri-stated?