Maybe a bit more information:
1. The issue is also observed on other iMX6q board
2. The design uses OC and USB PWR dedicated pins (pinmux'ed to this dedicated function) to monitor VBUS
3. The touchscreen is powered from VBUS (from USB). The power supply quality has been checked with the oscilloscope - no distortion
4. The packet truncation also happens when USB analyzer do not show "Invalid PID sequence" error
5. The truncated packet, when compared with the correct one has the same binary data.
6. The problem is not seen with "no name" USB low-speed mouse - but it sends far less data (up till 66B), and it is correct for it to receive 4/46B of 255B descriptor data.
Please find screenshot from USB analyzer:

The most _strange_ issue here is the lack of _any_ error indicated by the HOST driver. All transmissions end
with USBINT set. No error interrupt present. This corrupted data (with smaller size than expected) is then
passed to upper layers, causing subtle errors.
Please find below some data dump from EHCI's qTD (Queue Element Transfer Descriptor):
[ 1.987479] ci_hdrc ci_hdrc.0: submit_async 1 urb edfe6e80 ep0out len 178, qtd ef061180 [qh edfe6780]
[ 1.988781] ehci urb: IRQ status: 0x1 INTREN: 0x37 hrt: 0x80
[ 1.988795] scan_async: urb qh: 0xedfe6780 qtd_list: 0xef0610f8
[ 1.988802] qh_completions: urb token 0x80000e00 0 178
[ 1.988809] qh_completions: urb token 0x920d08 0 178 <- here we do have still active "status" 9x8
[ 1.988815] qh_completions: urb token 0x8c00 32 178 <- here the IOC bit is set (0x8)
[ 1.988828] ci_hdrc ci_hdrc.0: ehci_urb_done 1 urb edfe6e80 ep0in status 0 len 32/178
The above code is executed after receiving "USBINT" interrupt - according to EHCI controller everything went fine........ [1]
[ 1.992192] ci_hdrc ci_hdrc.0: submit_async 1 urb edfe6e80 ep0out len 178, qtd ef061060 [qh edfe6780]
[ 1.995785] ehci urb: IRQ status: 0x1 INTREN: 0x37 hrt: 0x80
[ 1.995804] scan_async: urb qh: 0xedfe6780 qtd_list: 0xef0611b8
[ 1.995811] qh_completions: urb token 0x80000e00 0 178 <- setup transaction
[ 1.995819] qh_completions: urb token 0xd00 0 178 <- here we do have 0x0 status
[ 1.995825] qh_completions: urb token 0x8c00 178 178 <- here we do ask for interrupt when done
[ 1.995840] ci_hdrc ci_hdrc.0: ehci_urb_done 1 urb edfe6e80 ep0in status 0 len 178/178
This above debug output is for correct transmission (178B received).
Can somebody explain me why on [1] we do have the USBINT interrupt despite of not ACK'ed transfer?
Why the EHCI Host controller sends ZLP packet to end transaction, which was NOT ACK'ed?
The analyzer shows "PID error" - but qTD's token's "Error Counter (CERR)" is not changed.
Is there any workaround/fix for presented above problem?
Just a side question:
Are there any other debugging registers for ChipIdea's EHCI implementation?
Appendix C. from https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/ehci-specifica...
mentions about such registers. Are those available in iMX6q?
Thanks in advance for your help,
Lukasz