Is the internal Flash and Sram of the Kinetis KV5 family protected by ECC. If so where is the functionality described ? If not is it planned for future versions ?

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Is the internal Flash and Sram of the Kinetis KV5 family protected by ECC. If so where is the functionality described ? If not is it planned for future versions ?

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carltroili
Contributor I

In the whitepaper "Exploring the ARM® Cortex®-M7 Core: Providing Adaptability for the Internet of Tomorrow" ECC memory is mentioned but I haven't seen any mentioning in the referance manual. If it is implemented in the KV5 family please state in what versions it is implemented and where the functionality is described. If it is not implemented right now please inform me when it is planned to be added.

Regards

Carl Troili

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miduo
NXP Employee
NXP Employee

Hi,

From what I know the ECC memory for M7 is an optional support and unfortunately the MKV5X do not support the ECC memory at present. And I do not aware that we had any plan for it. Anyway, I will help to double confirm and will respose if any update available.

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