What is the reason behind, that the physical JTAG connector and surrounding pull-up resistors has VCC connected to SW2_1V8, while the NVCC_GPIO1 is connected to LVDO3_1V8? Is this necessary for any reason?
Table 16 in i.MX 7 hardware development guide specifies JTAG recommendations. In general, pull-ups are not really required.
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Vladan