First, do secondary wait states only apply to burst operations, or can they be treated as an extension of the primary wait states for single byte accesses?
Regardless, there doesn't appear to be a way to set the secondary wait state value. The _flexbus_config structure has a boolean for enabling the secondary wait states, but the is no field for the number of wait states. Not surprisingly, there is no code in FLEXBUS_Init() to set the appropriate bits in the CSCR register.
This is using MCUXpresso 10.0.2 and an SDK 2.2.0 built for the TWR-K64F120M.