Reason for imx6q GPU hang ?

[peteramond]

Hi All,

I encountered a problem with my iMX6Q custom hardware design with Linux version 4.1.15-1.0.0_ga+yocto+g76c24a0.

System was stable 2 days and worked properly for long time. Suddenly I encountered following problem.

I have an issue with GPU during I launch cameras (System stuck).

Camera launch >> gst-launch-1.0 v4l2src device=/dev/video0 ! autovideosink

Error message >> [galcore]: GPU[0] hang, automatic recovery.

It shows the test patterns without any conflict. When I run

gst-launch-1.0 videotestsrc pattern=0 ! autovideosink

There are no any conflict.

What can be the cause of this issue ? Will it be a DDR wrong memory calibration issue ?

Regards,

Peter.

[igorpadykov]

Hi Peter

to narrow down issue, could you try to reproduce it on nxp reference board

i.MX6Q Sabre SD and Demo Images

http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0_MX6QDLSOLO&appType=license&location=null&Pa... 

Best regards
igor
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[peteramond]

Hi @igorpadykov

I did it with imx6q sabre lite, nitrogen6_max as well. They worked properly. 

Do we have any way to verify GPU of imx6 in Yocto ? Any command which can run on Ubuntu or Yocto to verify GPU performances ?

When I run following commands gpu hang occurred. It even doesn't run test patterns. 

>>gst-launch-1.0 v4l2src device=/dev/video8 ! autovideosink

>>gst-launch-1.0 videotestsrc pattern=0 ! autovideosink

Can we imagine some thing happened to GPU section ? What can be the caus of this issue ?

Regards,

Peter.

[igorpadykov]

Hi Peter

if the same image runs well on reference boards, then this may point to

custom board ddr errors or power supplies issues (ripples, noise).

Except running gpu applications there is no other test method for gpu.

For power supplies one can check i.MX6 System Development User’s Guide

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf

Best regards
igor

[peteramond]

Hi @igorpadykov,

Many thanks again.

As well as I could figure out following. I have done some testing to narrow down the issue.

I can get videos using imxg2dvideosink which uses 2D GPU without any conflict. But when run imxeglvivsink which uses 3D GPU the system gets GPU hang. So it seems like 3D GPU section has damaged. But the reason is this system performed well 2 days without any conflict.

Can we imagine some thing happened to 3D GPU section ? What can be the caus of this issue ? According to my knowledge this looks like hardware problem. Do I have any thing to do to clarify this problem ?

Regards.

Peter.

[igorpadykov]

both imxeglvivsink& imxg2dvideosink are gstreamer-imx plugins

which are developed and supported by community, so one can post issue

on meta-fsl-arm mailing list, so that someone familiar with it could try to assist you.
https://lists.yoctoproject.org/listinfo/meta-freescale

nxp official bsps use i.mx gstreamer plugins imx-gst, difference is described on

trac.gateworks.com/wiki/Yocto/gstreamer

Best regards
igor

[peteramond]

igorpadykov‌

Hi....

Many thanks !!

How is it possible to work only 2D GPU ? If it is a power supply problem for GPU section the whole GPU shouldn't work. But here it just function 2D GPU and 3D GPU is not functioning. 

Whole the GPU section power up from VDD_PU_CAP internal regulator. In imx6q data sheet it is recommended to have 1.2V in VDD_PU_CAP. When I measure the voltage while the board is functioning it shows 1.12V. I doubt that. Is this the reason for this GPU hang when I'm using 3D GPU ? Any possibility with this low voltage for GPU hang ?

Regards.
Peter.

[igorpadykov]

Hi Peter

yes VDD_PU_CAP (and probably associated with it VDD_SOC_IN) bad power supplies may

cause GPU hang, please check Table 6. Operating Ranges i.MX6DQ Datasheet

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf
To check that, one can slightly increase VDD_PU_CAP or add additional capacitors and test if it hangs.

To work only 2D GPU one can look at:

IDE - Debug, Compile and Build Tools (15)
i.MX6D/Q/DL/S/SX GPU Tools
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...

Best regards
igor

[peteramond]

Hi @igorpadykov

To check that, one can slightly increase VDD_PU_CAP or add additional capacitors and test if it hangs

How can we increase VDD_PU_CAP ? It is the out put of LDO_PU internal regulator. So is it possible to change it to required 1.15V. When I measure LDO_PU output it is 1.11V.

This is the required conditions for our hardware using data sheet.

Regards,

Peter.

[igorpadykov]

Hi Peter

please check REG1_TARG in register PMU_REG_CORE, described in

i.MX6DQ Reference Manual

~igor

[peteramond]

Hi igorpadykov

I could find "set_ldo_voltage" and "LDO_PU" terms in SOC.C u-boot.imx files. But I could't find a place to change the REG1_TARG values.

Could you please point-out the files which should edit to change LDO_PU value.

Regards

[igorpadykov]

one can look at "fsl,soc-operating-points" in imx6q.dtsi
http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6q.dtsi?h=imx_4.1....

~igor

[peteramond]

Hi igorpadykov

1) Is this define voltage levels ? I doubt that it is frequencies !!! Can you explain me how can I change LDO_PU regulator output ?

fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
1200000 1275000
996000 1250000
852000 1250000
792000 1175000
396000 1175000

2) When I check present REG1_TARG register value of my custom board using devregs tool it says it is in "Power gate off mode" "0000" What that means ? I think those are default settings.

 

3) Following you can see VDD_PU_CAP means LDO_PU regulator output and that will be GPU power in. Am I correct ? When I measure VDD_PU_CAP in my custom design it is 1.1V. Is this correct ? Can you explain following diagram which related to GPU power section ?

4) When I check the REG1_TARG register values in my custom board LDO_PU is in bypassed mood. Then from where the GPUs get power ?

Regards,

Peter.

[igorpadykov]

Hi Peter

REG1_TARG in bypassed mode means VDDSOC_IN is directly passed to VDD_PU_CAP
without regulation. To be able to set REG1_TARG it is necessary to use "ldo-on"
mode (not bypassed), files with "ldo" suffix like zImage-imx6q-sabresd-ldo.dtb e.t.c.
Still you can slightly increase "fsl,soc-operating-points" settings to test if it will
improve stability. Use Table 6 Operating Ranges i.MX6DQ Datasheet
http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf

>3)  ...
correct

Best regards
igor

[peteramond]

Dear igorpadykov

Thanks again !!!

1) In following dtsi code what is the meaning of ARM kHz ? Is that the VPU clock frequency ?

fsl,soc-operating-points = <                     
/* ARM kHz  SOC-PU uV */                     
1200000    1275000                     
996000     1250000                     
852000     1250000                     
792000     1175000                     
396000     1175000

2) What is the different between "power gate off mode" and "power fet switched full on.no regulation" modes ?

Regards,

Peter.