MPC5748G  CAN&CANFD

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MPC5748G  CAN&CANFD

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tony_huang
Contributor III

Hi,

      My project is using  canfd  module, and we encounted some questions, please see the drive code attach.

 

1. canfd transmit time:

    We put the canfd transmit module in 1 second task, but through the PCAN-View, it apperans 2s. I checked the PIT Timer,     and it is right for 1s.  When we  put the can(not canfd) transmit module in 1 second task,  through the PCAN-View, it      apperans 1s.

186615_186615.jpgQQ图片20170613175240.jpg

 

2.canfd interrupt:

   Through the PCAN-View , it  transmitted  canfd-standard  id and canfd-extended id msgs, sometimes  they both could  enter  receive interrupt, but sometimes canfd-standard id msgs could not   enter  receive interrupt, and canfd-extended id msgs could enter  receive interrupt.(0xC9  is canfd-standard id,  not everytime enter receive interrupt; 0x18FF00F5 is canfd-extended id and everytime could enter receive interrupt)

186616_186616.jpgQQ图片20170613180256.jpg

 

The attachment inclues  can.c and main.c.  
           

Original Attachment has been moved to: code.rar

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

This is most probably SW issue.

1. I can suggest to check with the scope if the message is really sent. Also if the code really hit the line the CODE field is written with 0xC. For example with the help of toggling the pin.

2. Once the message is received, is the MBs flag set and just ISR is not called? Do you see a case when more MBs are served within single ISR, mean several MB flags are set?

Check if the MBs and filters are properly initialized. By default the MB’s IDE bit is allways compared with received one.

How do you distinguish between standard and extended message. Two separate MBs should be set for it. I do not see it in your code, unless CTRL2[EACEN] is set and respective MB’s filter bit is cleared.

BR, Petr

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chenxiubo
Contributor III

1.Why distinguish between standard and extended message?  In can_init, I set pFlexCAN[chn]->RXIMR[i].R = 0x00000000;  That means receive evrerything.

2. I don't understand yours means:Two separate MBs should be set for it. I do not see it in your code, unless             CTRL2[EACEN] is set and respective MB’s filter bit is cleared. 

   Could you please describe more clearly or supply for any demos.

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