9S08QD4 / 9S08QD2 : Confusing data sheet MC9S08QD4.pdf , Rev. 3 , 11/2007

[Problem99]

The actual data sheet for 9S08QD4 / 9S08QD2  is named  MC9S08QD4.pdf , Rev. 3 , 11/2007 .

I've found several unclear and confusing content.

E.g.

1.) Chapter 9, clock source
1a.) Page 36, register "ICSSC", Bit CLKST.
Does not match with detailled description chapter 9.3.4 (page 129).
Looks like page 129, 130 is wrong or "oversized".
Also see page 126, figure 9-2. Totally wrong, there is no "external clock" for this device, and the shown selection bits are partly not available.
===> Clock Source chapter (9) needs excessive labor (rework).
1b) Question: Is ist required to setup any clock registers, or do power-on-reset values for ICSC1 / ICSC2 have proper state?
Is it required to wait for single CLKST bit (unless cleared).
1c) What about FLL "trim" stuff? Why FTRIM bit of ICSSC isn't setup in standard examples ?

2.) ADC, Chapter 8
2a) Page 97 ff.  Same problem: Lot of channels, which are not available at this device. 
See "Up to 28 analog inputs" page 99.
Why describe general HCS08 things in special QD4/2 datasheet ??).
Simple delete the "N/A" part of the table!
2b) Other important (?) things are not explained, e.g. if "BGBE" bit is required or not, should be enabled once or de-activated after "Bandgap" conversion, etc.


I think, there are (several) more unclear points in other parts of the datasheet.

Rework for datasheet is strongly recommented and necessary.

Klaus
 

[fabio]

Hello Klaus,

I am not a Freescaler but I know exactly what you mean.

I think that this question has a lot to do with the way the HCS08 devices are built: this family of microcontrollers (as well as many others) reuse most peripheral modules within the devices. This approach reduces the manufacturer development costs and makes it easier to migrate from one device to another.

Freescale also has adopted the concept of including the programming information for these peripherals on its Reference Manuals and on some device datasheets.

Unfortunatelly, these documents are not so user-friendly and are somewhat generical (when in fact they should be more focused on the device specificy.

Maybe Freescale should produce a big "HCS Peripheral Reference Manual" with all peripheral-related information and smaller datasheets with just device-specific information (strangely, some datasheets are already written this way).

Regarding the QD4 datasheet, I believe that this revision added some errors to the ICS chapter (revision 1 I have here show the correct configuration for the ICSSC).

In fact, the only difference is the absence of the external clock option. That makes the OSCINIT bit (bit 1 of ICSSC) always "0" and CLKST always "0x".

Regarding the trim of the internal reference source, it is controlled by two registers: ICSTRM and the FTRIM bit of ICSSC. The device has a factory-programmed constant that should be loaded onto these registers during early init.

You can trim the ICS by simply loading the registers with specific symbols:

ICSSC = NV_FTRIM;
ICSTRM = NV_ICSTRM;

Note that some device include files do not have these symbols defined. In such case you must manually define them:

volatile unsigned char NV_FTRIM @ 0xFFAE;
volatile unsigned char NV_ICSTRM @ 0xFFAF;

Regarding the ADC, yes you are right, the QD4 does not have all those inputs. Again, this is a generic description for all ADC modules.

Regarding the bandgap reference, you only need to enable it if you are going to convert its output voltage ADC channel 27) or use it as the internal reference for the analog comparator.

I am also proud to say that ALL the above information (and much more) is available on my book: HCS08 Unleashed.

Best regards,