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imx6dl: eim: muxed async read - when are the data lines sampled

Question asked by Ludwig Zenz on Apr 25, 2017
Latest reply on May 1, 2017 by Ludwig Zenz

Hello,

 

i have already managed to read with the #eim parallel address/data bus from a fpga. We use a #muxed #async configuration of the bus.

 

When does the #imx6dl eim sample the data lines during a read operation? (after CS assertion?, after OE assertion? Which BLCK edge?)

How many samples are required?

 

Thank You.

 

Best regards,

Ludwig

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