Changes for SEC engine for custom board?

[tracysmith]

The SEC block is internal to the LS1043. This is a hardware accelerator for the various encryption/decryption algorithms. It is configurable through software.  It is located in the SoC. 

1) Need to know if there are any pins or anything else that a custom board needs to be concerned with for the SEC engine?

2) No custom board changes are required for secure boot or the Trust Zone, is this correct? 

3) If hardware custom board changes are required, what are they?

[r8070z]

Have a great day,

Let say that the same LS1043A board can be flashed for the secure boot or for non-secure boot. The LS1043A device should has the SEC (there are LS1043A devices without the SEC). The SEC and TrustZone do not rely to any pin. The LS1043 implements Trust Architecture to support secure boot, debug protection, external tamper detection.

Use of the Trust Architecture features is dependent on programming fuses in the LS1043A. To program these fuses, the user is required to supply 1.8 V to the TA_PROG_SFP pin per Power sequencing. TA_PROG_SFP should only be powered for the duration of the fuse programming cycle. All other times, TA_PROG_SFP should be connected to GND. Users not implementing the QorIQ platform's Trust Architecture features should connect TA_PROG_SFP to GND too.

Users have the ability to define system-level, physical security policies and report violations of those physical security policies to the security monitor using tamper detection input signals on 2 pins - TA_TMP_DETECT_B and TA_BB_TMP_DETECT_B. The user-defined external tamper detection circuitry needs to maintain the chip's tamper detect inputs at the specified voltage.

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[tracysmith]

Very good.  How do I determine which LS1043A boards have the SEC engine and which do not?  Is there  a list of LS1043A boards that SEC engine is include and some where they are not?

[r8070z]

I see you have got answer already https://community.nxp.com/thread/447784