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K22F FlexBus SRAM

Question asked by Martin Dusek on Feb 20, 2017
Latest reply on Feb 27, 2017 by Hui_Ma

This is my configuration of FlexBUS for IS61LV256AL SRAM (http://www.mouser.com/ds/2/198/61LV256AL-258426.pdf) and MK22FN512VLL12

 

    FB->CS[0].CSCR  =   FB_CSCR_PS(1)      // 8-bit port7
      | FB_CSCR_ASET(0x0)
   | FB_CSCR_RDAH(0x0)
   | FB_CSCR_WRAH(0x0)
      | FB_CSCR_AA_MASK    // auto-acknowledge
   | FB_CSCR_WS(0x0)   // 2 wait states
   | FB_CSCR_BSTR_MASK
   | FB_CSCR_BSTW_MASK
;
    FB->CS[0].CSMR = FB_CSMR_BAM(0x7)  //Set base address mask for 512K address space
      | FB_CSMR_V_MASK    //Enable cs valid signal
;
With this code, read of 8-bit wide data takes 5 FlexBus cycles. However, reference manual (http://www.nxp.com/assets/documents/data/en/reference-manuals/K22P121M120SF7RM.pdf , page 711) states that it should take only 4 FlexBus cycles.
Is it possible to improve performance of FlexBus read in my case?

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