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Monitor Mode on I2C Interface, LPC4088

Question asked by Alexander Planitzer on Feb 2, 2017
Latest reply on Feb 21, 2017 by Carlos_Mendoza



I managed to setup the I2C Interface on my LPC4088 in Monitor Mode and i can see everything that is transmitted on the bus, but i ran into a problem. 


Apparently my Interface interprets all intercepted I2C-Packets (so everything between Start and Stop Condition) as Writing-Operations (aka Slave-Receiver Operation). 


Meaning the State changes of the Interface (content of I2C_STAT register) look like:

0x60 -> 0x80 -> 0x80 -> ... -> 0xA0


where the states indicate the following:

0x60: Own Slave Address + Write Bit received, ACK received

0x80: Addressed with own Slave Address, Data received, ACK returned

0xA0: Stop or Repeated Start received


However they should also be State changes like (to indicate Slave-Transmitter Operations): 

0xA8 -> 0xB8 -> 0xB8 -> ... -> 0xC8 -> 0xA0


where the states indicate the following:

0xA8: Own Slave Address + Read Bit has been received; ACK has been returned

0xB8: Data byte in I2DAT has been transmitted; ACK has been received

0xC8: Last data byte has been transmitted, ACK has been received


I verified the measured protocol with an Logic Analyzer and the Results indicate that the R/W-Bit was indeed transmitted correctly. 


I checked the 7-bit address + R/W-bit which is transmitted in the first byte after the start condition and the address is always correct but the R/W-bit is always '0' (but at the same time '1', when measured with the logic analyser


Here is the code i used to configure the I2C interface:


LPC_I2Cx(id)->ADR0 = (I2C_SLAVE_ADDR << 1); //Set own device address
LPC_I2Cx(id)->MASK[0] = (I2C_SLAVE_MSK << 1); //Set address mask
LPC_I2Cx(id)->MMCTRL |= I2C_I2MMCTRL_MM_ENA; //Enable I2C Monitor Mode
LPC_I2Cx(id)->CONCLR = I2C_CON_STA | I2C_CON_STO | I2C_CON_SI; //Enable I2C Interface

I also tried different I2C-Interfaces, but the result was the same.



What causes this behavior?


Is it the I2C Interface itself interpreting the R/W Bit as a '0' because its always "reading" from the Bus?


If YES, is there a way to bypass this Issue?

If NO, did I configure something wrong? 


(Feedback/Suggestions/Experiences are much appreciated ;-) )