Hello,
I'm trying to get the SPI example project "periph_spi_sm_int" working with SPI1 as the master and SPI0 as the slave. The example worked when SPI0 was the master, but switching the two gives this output:
SLAVE [txDoneCount = 1, rxDoneCount = 0]
MASTER [txDoneCount = 16, rxDoneCount = 16]TRANSFER COMPLETE: errors = 0
Master total transfer time = 18893uS
Showing data from : Master TX data
0x0121 0x0122 0x0123 0x0124 0x0125 0x0126 0x0127 0x0128
0x0129 0x012a 0x012b 0x012c 0x012d 0x012e 0x012f 0x0130
Showing data from : Master RX data
0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff
0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff
Showing data from : Slave TX data
0xfede 0xfedd 0xfedc 0xfedb 0xfeda 0xfed9 0xfed8 0xfed7
0xfed6 0xfed5 0xfed4 0xfed3 0xfed2 0xfed1 0xfed0 0xfecf
Showing data from : Slave RX data
0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
I have tried switching the MOSI and MISO pins, but got the same result. The only change I made to the example was switching the macros:
/* Board specific example setup */
//#define SPIMASTERIRQHANDLER SPI0_IRQHandler
//#define LPC_SPIMASTERPORT LPC_SPI0
//#define LPC_SPIMASTERIRQNUM SPI0_IRQn
//#define SPISLAVEIRQHANDLER SPI1_IRQHandler
//#define LPC_SPISLAVEPORT LPC_SPI1
//#define LPC_SPISLAVEIRQNUM SPI1_IRQn#define SPIMASTERIRQHANDLER SPI1_IRQHandler
#define LPC_SPIMASTERPORT LPC_SPI1
#define LPC_SPIMASTERIRQNUM SPI1_IRQn
#define SPISLAVEIRQHANDLER SPI0_IRQHandler
#define LPC_SPISLAVEPORT LPC_SPI0
#define LPC_SPISLAVEIRQNUM SPI0_IRQn
Thanks
Hi Mazar Farran,
Thank you for your interest in NXP Semiconductor products and the opportunity to serve you.
Before answer this question, I was wondering if you can tell me which chip you use.
I'm looking forward to your reply.
Have a great day,
Ping
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Hi Ping,
I'm using the LPC54102J512 chip. The board is the LPCXpresso54102.
Thank you!
Mazar